Local Advanced Programmable Interrupt Controller.
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Local Advanced Programmable Interrupt Controller.
Local APICs
Each CPU has its own local APIC, which, when used with the IO APICs, allows for more advanced interrupt handling in comparison to the traditional PIC, such as routing interrupts to specific CPUs, interrupt prioritization, and more. Most of its features are not used in PatchworkOS yet.
Additionally, the local APICs provide Inter-Processor Interrupts (IPIs) which allow a CPU to interrupt another CPU by using its local APIC.
- Note
- Its a common mistake to assume that the local APIC IDs are contiguous, or that they are the same as the CPU IDs, but this is not the case. The local APIC IDs are assigned by the firmware and can be any value.
- See also
- ACPI Specification Version 6.6
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| #define | LAPIC_REG_ID_OFFSET 24 |
| | The offset at which the lapic id is stored in the LAPIC_REG_ID register.
|
| |
|
| enum | lapic_msr_flags_t { LAPIC_MSR_ENABLE = 0x800
, LAPIC_MSR_BSP = 0x100
} |
| | Local APIC MSR Flags. More...
|
| |
| enum | lapic_register_t {
LAPIC_REG_ID = 0x020
, LAPIC_REG_VERSION = 0x030
, LAPIC_REG_TASK_PRIORITY = 0x080
, LAPIC_REG_ARBITRATION_PRIORITY = 0x090
,
LAPIC_REG_PROCESSOR_PRIORITY = 0x0A0
, LAPIC_REG_EOI = 0x0B0
, LAPIC_REG_REMOTE_READ = 0x0C0
, LAPIC_REG_LOGICAL_DEST = 0x0D0
,
LAPIC_REG_DEST_FORMAT = 0x0E0
, LAPIC_REG_SPURIOUS = 0x0F0
, LAPIC_REG_ISR_BASE = 0x100
, LAPIC_REG_TMR_BASE = 0x180
,
LAPIC_REG_IRR_BASE = 0x200
, LAPIC_REG_ERROR_STATUS = 0x280
, LAPIC_REG_LVT_CMCI = 0x2F0
, LAPIC_REG_ICR0 = 0x300
,
LAPIC_REG_ICR1 = 0x310
, LAPIC_REG_LVT_TIMER = 0x320
, LAPIC_REG_LVT_THERMAL = 0x330
, LAPIC_REG_LVT_PERFCTR = 0x340
,
LAPIC_REG_LVT_LINT0 = 0x350
, LAPIC_REG_LVT_LINT1 = 0x360
, LAPIC_REG_LVT_ERROR = 0x370
, LAPIC_REG_TIMER_INITIAL_COUNT = 0x380
,
LAPIC_REG_TIMER_CURRENT_COUNT = 0x390
, LAPIC_REG_TIMER_DIVIDER = 0x3E0
} |
| | Local APIC Registers. More...
|
| |
| enum | lapic_flags_t { LAPIC_SPURIOUS_ENABLE = (1 << 8)
, LAPIC_LVT_MASKED = (1 << 16)
} |
| | Local APIC Flags. More...
|
| |
| enum | lapic_icr_delivery_mode_t {
LAPIC_ICR_FIXED = (0 << 8)
, LAPIC_ICR_LOWEST_PRIORITY = (1 << 8)
, LAPIC_ICR_SMI = (2 << 8)
, LAPIC_ICR_NMI = (4 << 8)
,
LAPIC_ICR_INIT = (5 << 8)
, LAPIC_ICR_STARTUP = (6 << 8)
} |
| | Local APIC ICR Delivery Modes. More...
|
| |
| enum | lapic_icr_flags_t { LAPIC_ICR_CLEAR_INIT_LEVEL = (1 << 14)
} |
| | Local APIC ICR Flags. More...
|
| |
◆ LAPIC_REG_ID_OFFSET
| #define LAPIC_REG_ID_OFFSET 24 |
The offset at which the lapic id is stored in the LAPIC_REG_ID register.
Definition at line 83 of file lapic.h.
◆ lapic_id_t
Local APIC ID type.
Definition at line 34 of file lapic.h.
◆ lapic_msr_flags_t
Local APIC MSR Flags.
| Enumerator |
|---|
| LAPIC_MSR_ENABLE | |
| LAPIC_MSR_BSP | |
Definition at line 40 of file lapic.h.
◆ lapic_register_t
Local APIC Registers.
| Enumerator |
|---|
| LAPIC_REG_ID | |
| LAPIC_REG_VERSION | |
| LAPIC_REG_TASK_PRIORITY | |
| LAPIC_REG_ARBITRATION_PRIORITY | |
| LAPIC_REG_PROCESSOR_PRIORITY | |
| LAPIC_REG_EOI | |
| LAPIC_REG_REMOTE_READ | |
| LAPIC_REG_LOGICAL_DEST | |
| LAPIC_REG_DEST_FORMAT | |
| LAPIC_REG_SPURIOUS | |
| LAPIC_REG_ISR_BASE | |
| LAPIC_REG_TMR_BASE | |
| LAPIC_REG_IRR_BASE | |
| LAPIC_REG_ERROR_STATUS | |
| LAPIC_REG_LVT_CMCI | |
| LAPIC_REG_ICR0 | |
| LAPIC_REG_ICR1 | |
| LAPIC_REG_LVT_TIMER | |
| LAPIC_REG_LVT_THERMAL | |
| LAPIC_REG_LVT_PERFCTR | |
| LAPIC_REG_LVT_LINT0 | |
| LAPIC_REG_LVT_LINT1 | |
| LAPIC_REG_LVT_ERROR | |
| LAPIC_REG_TIMER_INITIAL_COUNT | |
| LAPIC_REG_TIMER_CURRENT_COUNT | |
| LAPIC_REG_TIMER_DIVIDER | |
Definition at line 50 of file lapic.h.
◆ lapic_flags_t
Local APIC Flags.
| Enumerator |
|---|
| LAPIC_SPURIOUS_ENABLE | |
| LAPIC_LVT_MASKED | |
Definition at line 89 of file lapic.h.
◆ lapic_icr_delivery_mode_t
Local APIC ICR Delivery Modes.
| Enumerator |
|---|
| LAPIC_ICR_FIXED | |
| LAPIC_ICR_LOWEST_PRIORITY | |
| LAPIC_ICR_SMI | |
| LAPIC_ICR_NMI | |
| LAPIC_ICR_INIT | |
| LAPIC_ICR_STARTUP | |
Definition at line 99 of file lapic.h.
◆ lapic_icr_flags_t
Local APIC ICR Flags.
| Enumerator |
|---|
| LAPIC_ICR_CLEAR_INIT_LEVEL | |
Definition at line 113 of file lapic.h.
◆ lapic_init()
| void lapic_init |
( |
cpu_t * |
cpu | ) |
|
Initialize the local APIC for a CPU.
- Parameters
-
◆ lapic_read()
Read from a local apic register.
- Parameters
-
| reg | The register to read from. |
- Returns
- The value read from the register.
Definition at line 37 of file lapic.c.
◆ lapic_write()
Write to a local apic register.
- Parameters
-
| reg | The register to write to. |
| value | The value to write. |
Definition at line 42 of file lapic.c.
◆ lapic_send_init()
Send an INIT IPI to the specified local APIC.
Sending an INIT IPI will cause the target CPU to enter the INIT state, preparing it for startup.
- Parameters
-
| id | The ID of the local APIC to send the INIT IPI to. |
Definition at line 66 of file lapic.c.
◆ lapic_send_sipi()
| void lapic_send_sipi |
( |
lapic_id_t |
id, |
|
|
void * |
entryPoint |
|
) |
| |
Send a Startup IPI (SIPI) to the specified local APIC.
Sending a SIPI will cause the target CPU to start executing code at the specified entry point address.
- Parameters
-
| id | The ID of the local APIC to send the SIPI to. |
| entryPoint | The entry point address for the SIPI, must be page-aligned. |
Definition at line 72 of file lapic.c.
◆ lapic_global_init()
Global initialization for the local APICs.
- Returns
- On success,
0. On failure, ERR and errno is set.
Definition at line 80 of file lapic.c.
◆ _pcpu_lapic
The per-CPU local APIC structure.