- Generated on Tue Jun 9 2026 16:27:59 for Reduct by
1.9.8
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Reduct
v4.0.5-1-g4851deb
A functional and immutable language.
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Instructions are 32-bit words with the following formats:
Fields:
To determine if the C field is a register or a constant the reduct_mode_t flags are used to modify the opcode.
REDUCT_OPCODE_EQUAL always need to act on registers, which introduces unnecessary MOV instructions to load constants into registers before they can be compared. Macros | |
| #define | REDUCT_REGISTER_INVALID ((reduct_reg_t) - 1) |
| Invalid register value. | |
| #define | REDUCT_INST_READS_REG(_inst, _reg) |
| Check if an instruction reads from a specific register. | |
| #define | REDUCT_INST_WRITES_REG(_inst, _reg) (REDUCT_OPCODE_HAS_TARGET(REDUCT_INST_GET_OP(_inst)) && (_reg) == REDUCT_INST_GET_A(_inst)) |
| Check if an instruction writes to a specific register. | |
| #define | REDUCT_INST_WIDTH_OPCODE 8U |
| Opcode width in bits. | |
| #define | REDUCT_INST_WIDTH_A 8U |
| A operand width in bits. | |
| #define | REDUCT_INST_WIDTH_B 8U |
| B operand width in bits. | |
| #define | REDUCT_INST_WIDTH_C 8U |
| C operand width in bits. | |
| #define | REDUCT_INST_WIDTH_SAX (REDUCT_INST_WIDTH_A + REDUCT_INST_WIDTH_B) |
| SAx operand width in bits. | |
| #define | REDUCT_REGISTER_MAX (1U << REDUCT_INST_WIDTH_A) |
| The max number of registers per function frame. | |
| #define | REDUCT_CONSTANT_MAX (1U << REDUCT_INST_WIDTH_C) |
| The max number of constants per function. | |
| #define | REDUCT_INST_POS_OPCODE 0U |
| Opcode position in bits. | |
| #define | REDUCT_INST_POS_A (REDUCT_INST_POS_OPCODE + REDUCT_INST_WIDTH_OPCODE) |
| A operand position in bits. | |
| #define | REDUCT_INST_POS_B (REDUCT_INST_POS_A + REDUCT_INST_WIDTH_A) |
| B operand position in bits. | |
| #define | REDUCT_INST_POS_C (REDUCT_INST_POS_B + REDUCT_INST_WIDTH_B) |
| C operand position in bits. | |
| #define | REDUCT_INST_POS_SAX (REDUCT_INST_POS_A) |
| SAx operand position in bits. | |
| #define | REDUCT_INST_MASK_OPCODE ((1U << REDUCT_INST_WIDTH_OPCODE) - 1U) |
| Opcode mask. | |
| #define | REDUCT_INST_MASK_A ((1U << REDUCT_INST_WIDTH_A) - 1U) |
| A operand mask. | |
| #define | REDUCT_INST_MASK_B ((1U << REDUCT_INST_WIDTH_B) - 1U) |
| B operand mask. | |
| #define | REDUCT_INST_MASK_C ((1U << REDUCT_INST_WIDTH_C) - 1U) |
| C operand mask. | |
| #define | REDUCT_INST_MASK_SAX ((1U << REDUCT_INST_WIDTH_SAX) - 1U) |
| SAx operand mask. | |
| #define | REDUCT_INST_MAKE_ABC(_op, _a, _b, _c) |
| Create an instruction with opcode, A, B, and C operands. | |
| #define | REDUCT_INST_MAKE_SAXC(_op, _sax, _c) |
| Create an instruction with opcode and SAx operand, and C operand. | |
| #define | REDUCT_INST_GET_OP(_inst) (((_inst) >> REDUCT_INST_POS_OPCODE) & REDUCT_INST_MASK_OPCODE) |
| Get the opcode from an instruction. | |
| #define | REDUCT_INST_GET_A(_inst) (((_inst) >> REDUCT_INST_POS_A) & REDUCT_INST_MASK_A) |
| Get the A operand from an instruction. | |
| #define | REDUCT_INST_GET_B(_inst) (((_inst) >> REDUCT_INST_POS_B) & REDUCT_INST_MASK_B) |
| Get the B operand from an instruction. | |
| #define | REDUCT_INST_GET_C(_inst) (((_inst) >> REDUCT_INST_POS_C) & REDUCT_INST_MASK_C) |
| Get the C operand from an instruction. | |
| #define | REDUCT_INST_GET_SAX(_inst) ((int32_t)(int16_t)(((_inst) >> REDUCT_INST_POS_SAX) & REDUCT_INST_MASK_SAX)) |
| Get the SAX operand from an instruction. | |
| #define | REDUCT_INST_SET_OP(_inst, _op) |
| Set the opcode in an instruction. | |
| #define | REDUCT_INST_SET_A(_inst, _a) (((_inst) & ~(REDUCT_INST_MASK_A << REDUCT_INST_POS_A)) | (((_a) & REDUCT_INST_MASK_A) << REDUCT_INST_POS_A)) |
| Set the A operand in an instruction. | |
| #define | REDUCT_INST_SET_B(_inst, _b) (((_inst) & ~(REDUCT_INST_MASK_B << REDUCT_INST_POS_B)) | (((_b) & REDUCT_INST_MASK_B) << REDUCT_INST_POS_B)) |
| Set the B operand in an instruction. | |
| #define | REDUCT_INST_SET_C(_inst, _c) (((_inst) & ~(REDUCT_INST_MASK_C << REDUCT_INST_POS_C)) | (((_c) & REDUCT_INST_MASK_C) << REDUCT_INST_POS_C)) |
| Set the C operand in an instruction. | |
| #define | REDUCT_INST_SET_SAX(_inst, _sax) (((_inst) & ~(REDUCT_INST_MASK_SAX << REDUCT_INST_POS_A)) | (((_sax) & REDUCT_INST_MASK_SAX) << REDUCT_INST_POS_A)) |
| Set the SAX operand in an instruction. | |
Typedefs | |
| typedef uint16_t | reduct_const_t |
| Constant index type. | |
| typedef uint16_t | reduct_reg_t |
| Register type. | |
| typedef uint32_t | reduct_inst_t |
| Instruction type. | |
| #define REDUCT_REGISTER_INVALID ((reduct_reg_t) - 1) |
| #define REDUCT_INST_READS_REG | ( | _inst, | |
| _reg | |||
| ) |
Check if an instruction reads from a specific register.
| _inst | The instruction. |
| _reg | The register index. |
| #define REDUCT_INST_WRITES_REG | ( | _inst, | |
| _reg | |||
| ) | (REDUCT_OPCODE_HAS_TARGET(REDUCT_INST_GET_OP(_inst)) && (_reg) == REDUCT_INST_GET_A(_inst)) |
| #define REDUCT_INST_WIDTH_SAX (REDUCT_INST_WIDTH_A + REDUCT_INST_WIDTH_B) |
| #define REDUCT_REGISTER_MAX (1U << REDUCT_INST_WIDTH_A) |
| #define REDUCT_CONSTANT_MAX (1U << REDUCT_INST_WIDTH_C) |
| #define REDUCT_INST_POS_A (REDUCT_INST_POS_OPCODE + REDUCT_INST_WIDTH_OPCODE) |
| #define REDUCT_INST_POS_B (REDUCT_INST_POS_A + REDUCT_INST_WIDTH_A) |
| #define REDUCT_INST_POS_C (REDUCT_INST_POS_B + REDUCT_INST_WIDTH_B) |
| #define REDUCT_INST_POS_SAX (REDUCT_INST_POS_A) |
| #define REDUCT_INST_MASK_OPCODE ((1U << REDUCT_INST_WIDTH_OPCODE) - 1U) |
| #define REDUCT_INST_MASK_A ((1U << REDUCT_INST_WIDTH_A) - 1U) |
| #define REDUCT_INST_MASK_B ((1U << REDUCT_INST_WIDTH_B) - 1U) |
| #define REDUCT_INST_MASK_C ((1U << REDUCT_INST_WIDTH_C) - 1U) |
| #define REDUCT_INST_MASK_SAX ((1U << REDUCT_INST_WIDTH_SAX) - 1U) |
| #define REDUCT_INST_MAKE_ABC | ( | _op, | |
| _a, | |||
| _b, | |||
| _c | |||
| ) |
Create an instruction with opcode, A, B, and C operands.
| _op | Opcode operand. |
| _a | A operand. |
| _b | B operand. |
| _c | C operand. |
| #define REDUCT_INST_MAKE_SAXC | ( | _op, | |
| _sax, | |||
| _c | |||
| ) |
Create an instruction with opcode and SAx operand, and C operand.
| _op | Opcode operand. |
| _sax | SAx operand. |
| _c | C operand. |
| #define REDUCT_INST_GET_OP | ( | _inst | ) | (((_inst) >> REDUCT_INST_POS_OPCODE) & REDUCT_INST_MASK_OPCODE) |
| #define REDUCT_INST_GET_A | ( | _inst | ) | (((_inst) >> REDUCT_INST_POS_A) & REDUCT_INST_MASK_A) |
| #define REDUCT_INST_GET_B | ( | _inst | ) | (((_inst) >> REDUCT_INST_POS_B) & REDUCT_INST_MASK_B) |
| #define REDUCT_INST_GET_C | ( | _inst | ) | (((_inst) >> REDUCT_INST_POS_C) & REDUCT_INST_MASK_C) |
| #define REDUCT_INST_GET_SAX | ( | _inst | ) | ((int32_t)(int16_t)(((_inst) >> REDUCT_INST_POS_SAX) & REDUCT_INST_MASK_SAX)) |
| #define REDUCT_INST_SET_OP | ( | _inst, | |
| _op | |||
| ) |
Set the opcode in an instruction.
| _inst | Instruction. |
| _op | Opcode value. |
| #define REDUCT_INST_SET_A | ( | _inst, | |
| _a | |||
| ) | (((_inst) & ~(REDUCT_INST_MASK_A << REDUCT_INST_POS_A)) | (((_a) & REDUCT_INST_MASK_A) << REDUCT_INST_POS_A)) |
| #define REDUCT_INST_SET_B | ( | _inst, | |
| _b | |||
| ) | (((_inst) & ~(REDUCT_INST_MASK_B << REDUCT_INST_POS_B)) | (((_b) & REDUCT_INST_MASK_B) << REDUCT_INST_POS_B)) |
| #define REDUCT_INST_SET_C | ( | _inst, | |
| _c | |||
| ) | (((_inst) & ~(REDUCT_INST_MASK_C << REDUCT_INST_POS_C)) | (((_c) & REDUCT_INST_MASK_C) << REDUCT_INST_POS_C)) |
| #define REDUCT_INST_SET_SAX | ( | _inst, | |
| _sax | |||
| ) | (((_inst) & ~(REDUCT_INST_MASK_SAX << REDUCT_INST_POS_A)) | (((_sax) & REDUCT_INST_MASK_SAX) << REDUCT_INST_POS_A)) |
| typedef uint16_t reduct_reg_t |
1.9.8